Disclosure: On this site you won’t find specific advice on “how to call function xyz()”. Interpreting C++ ARM and #pragma dwim is also out of scope.

We’re treating our readers as intelligent beings who can use Google and/or StackOverflow, where all such specific questions were answered more than once.

What you will find is opinions, more opinions, and even more opinions on all the aspects of software development - and with a large chunk of them based on real-world experience too.

Your mileage may vary. Batteries not included.

Optimizing Big Number Arithmetic Without SSE

March 1, 2014 by “No Bugs” Bunny

Optimizing Big Number Arithmetic Without SSE - Post preview image

Abstract:

How to optimize big number maths without SSE

Quote:

OpenSSL prefers to use assembler for big number calculations

Filed under: On.ProgrammingTips and TricksOptimizations

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On the Other Side of the Barricade: Job Interviewer Do’s and Don’ts

January 1, 2014 by “No Bugs” Bunny

On the Other Side of the Barricade: Job Interviewer Do’s and Don’ts - Post preview image

Abstract:

How to conduct job interview - for newbie and not-so-newbie team leads

Quote:

Trying asserting that you’re better than the candidate you’re interviewing, is a Very Bad Thing™ for several reasons

Filed under: On.DevelopmentIT Careers & IT Hiring

Tagged With: ManagerOverload
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YAGNI-C as a Practical Application of YAGNI

November 1, 2013 by “No Bugs” Bunny

YAGNI-C as a Practical Application of YAGNI - Post preview image

Abstract:

YAGNI-C is a clarified version of YAGNI, which has been successfully applied in practice.

Quote:

Thinking ahead is good, implementing ahead is bad

Filed under: On.DevelopmentDevelopment Processes

Tagged With: AgileOverload
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Hard Upper Limit on Memory Latency

September 1, 2013 by “No Bugs” Bunny

Hard Upper Limit on Memory Latency - Post preview image

Abstract:

Speed of light imposes hard limits on possible latencies of high-volume RAM

Quote:

Even if each bit is implemented by single atom of silicon, 2^90-byte RAM is the largest RAM which can possibly have latencies comparable to modern DDR3 SDRAM.

Filed under: On.System ArchitectureRequirement analysisOn.ProgrammingOptimizations

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